Application Engineer II: Analog IC Design and Simulation – Cadence Design Systems

Titulo da Vaga: Application Engineer II: Analog IC Design and Simulation

Localização: Belo Horizonte – MG

Descrição da Vaga: -driven layout, layout-dependent effects, and simulation setup; or help analyze simulation results related to DC, transient… debugging. Help mentoring junior engineers. Requirements: Bachelor’s or Master’s degree in Electrical Engineering

Nome da Empresa: Cadence Design Systems

Salário:

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